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'Design for Test & Manufacture in sub-wavelength technologies’

Guest lecture, Institute of System level Integration, Scotland, January 2006.

'Solving DSM Test Challenges’

Paper presentation at EuroDesign Conference, October 2004, Munich, Germany.

'The Test paradigm for Deep sub-micron’

Participated as part of a panel of industry experts to address the subject of industry roadmaps and requirements to enable Deep sub-Micron Design for Test and Design for Manufacture. Date 2004, Paris.

'Enabling LogicBIST with DFTAdvisor and FastScan'

Logic BIST based white paper and conference proceedings presented at the Silicon Valley Mentor Users Group (SVMUG) in San Jose, April 30, May 1, 2001.

'Scanbus' IP2000 - October 2000, Edinburgh

Presentation and conference proceeding submission. White paper to address a Jennic development for 'DfT - SoC and reuse'

'Silicon Integration of Intellectual Property'

F&M (German electronic magazine), July 1999.
Electronic Engineering, July 1999.
Methodology article based on an ASIC development for the Set-Top-Box market.

What is SCCAD?

Spectrum, July 1998.
Fujitsu internal publication to highlight the rollout of the Standard cell CAD flow. Target audience - Fujitsu engineering and marketing.

'Post-placement scan chain re-ordering'

F&M (German electronic magazine), November 1996.
Electronic Product Design, Volume 17, Issue 10, October 1996.
Methodology article based on flow development within the ASIC group.


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